/***************************************************************************//**
* \file cyreg_cpuss.h
*
* \brief
* CPUSS register definition header
*
* \note
* Generator version: 1.6.0.481
* Database revision: TVIIBH4M_PR3_0
*
********************************************************************************
* \copyright
* Copyright 2016-2021, Cypress Semiconductor Corporation. All rights reserved.
* You may use this file only in accordance with the license, terms, conditions,
* disclaimers, and limitations in the end user license agreement accompanying
* the software package with which this file was provided.
*******************************************************************************/

#ifndef _CYREG_CPUSS_H_
#define _CYREG_CPUSS_H_

#include "cyip_cpuss.h"

/**
  * \brief CPU subsystem (CPUSS) (CPUSS)
  */
#define CYREG_CPUSS_IDENTITY            ((volatile un_CPUSS_IDENTITY_t*) 0x40200000UL)
#define CYREG_CPUSS_CM7_0_STATUS        ((volatile un_CPUSS_CM7_0_STATUS_t*) 0x40200004UL)
#define CYREG_CPUSS_FAST_0_CLOCK_CTL    ((volatile un_CPUSS_FAST_0_CLOCK_CTL_t*) 0x40200008UL)
#define CYREG_CPUSS_CM7_0_CTL           ((volatile un_CPUSS_CM7_0_CTL_t*) 0x4020000CUL)
#define CYREG_CPUSS_CM7_0_INT_STATUS0   ((volatile un_CPUSS_CM7_0_INT_STATUS_t*) 0x40200100UL)
#define CYREG_CPUSS_CM7_0_INT_STATUS1   ((volatile un_CPUSS_CM7_0_INT_STATUS_t*) 0x40200104UL)
#define CYREG_CPUSS_CM7_0_INT_STATUS2   ((volatile un_CPUSS_CM7_0_INT_STATUS_t*) 0x40200108UL)
#define CYREG_CPUSS_CM7_0_INT_STATUS3   ((volatile un_CPUSS_CM7_0_INT_STATUS_t*) 0x4020010CUL)
#define CYREG_CPUSS_CM7_0_INT_STATUS4   ((volatile un_CPUSS_CM7_0_INT_STATUS_t*) 0x40200110UL)
#define CYREG_CPUSS_CM7_0_INT_STATUS5   ((volatile un_CPUSS_CM7_0_INT_STATUS_t*) 0x40200114UL)
#define CYREG_CPUSS_CM7_0_INT_STATUS6   ((volatile un_CPUSS_CM7_0_INT_STATUS_t*) 0x40200118UL)
#define CYREG_CPUSS_CM7_0_INT_STATUS7   ((volatile un_CPUSS_CM7_0_INT_STATUS_t*) 0x4020011CUL)
#define CYREG_CPUSS_CM7_0_VECTOR_TABLE_BASE ((volatile un_CPUSS_CM7_0_VECTOR_TABLE_BASE_t*) 0x40200200UL)
#define CYREG_CPUSS_CM7_0_NMI_CTL0      ((volatile un_CPUSS_CM7_0_NMI_CTL_t*) 0x40200240UL)
#define CYREG_CPUSS_CM7_0_NMI_CTL1      ((volatile un_CPUSS_CM7_0_NMI_CTL_t*) 0x40200244UL)
#define CYREG_CPUSS_CM7_0_NMI_CTL2      ((volatile un_CPUSS_CM7_0_NMI_CTL_t*) 0x40200248UL)
#define CYREG_CPUSS_CM7_0_NMI_CTL3      ((volatile un_CPUSS_CM7_0_NMI_CTL_t*) 0x4020024CUL)
#define CYREG_CPUSS_TRC_DBG_CLOCK_CTL   ((volatile un_CPUSS_TRC_DBG_CLOCK_CTL_t*) 0x40200320UL)
#define CYREG_CPUSS_CM7_1_STATUS        ((volatile un_CPUSS_CM7_1_STATUS_t*) 0x40200404UL)
#define CYREG_CPUSS_FAST_1_CLOCK_CTL    ((volatile un_CPUSS_FAST_1_CLOCK_CTL_t*) 0x40200408UL)
#define CYREG_CPUSS_CM7_1_CTL           ((volatile un_CPUSS_CM7_1_CTL_t*) 0x4020040CUL)
#define CYREG_CPUSS_CM7_1_INT_STATUS0   ((volatile un_CPUSS_CM7_1_INT_STATUS_t*) 0x40200500UL)
#define CYREG_CPUSS_CM7_1_INT_STATUS1   ((volatile un_CPUSS_CM7_1_INT_STATUS_t*) 0x40200504UL)
#define CYREG_CPUSS_CM7_1_INT_STATUS2   ((volatile un_CPUSS_CM7_1_INT_STATUS_t*) 0x40200508UL)
#define CYREG_CPUSS_CM7_1_INT_STATUS3   ((volatile un_CPUSS_CM7_1_INT_STATUS_t*) 0x4020050CUL)
#define CYREG_CPUSS_CM7_1_INT_STATUS4   ((volatile un_CPUSS_CM7_1_INT_STATUS_t*) 0x40200510UL)
#define CYREG_CPUSS_CM7_1_INT_STATUS5   ((volatile un_CPUSS_CM7_1_INT_STATUS_t*) 0x40200514UL)
#define CYREG_CPUSS_CM7_1_INT_STATUS6   ((volatile un_CPUSS_CM7_1_INT_STATUS_t*) 0x40200518UL)
#define CYREG_CPUSS_CM7_1_INT_STATUS7   ((volatile un_CPUSS_CM7_1_INT_STATUS_t*) 0x4020051CUL)
#define CYREG_CPUSS_CM7_1_VECTOR_TABLE_BASE ((volatile un_CPUSS_CM7_1_VECTOR_TABLE_BASE_t*) 0x40200600UL)
#define CYREG_CPUSS_CM7_1_NMI_CTL0      ((volatile un_CPUSS_CM7_1_NMI_CTL_t*) 0x40200640UL)
#define CYREG_CPUSS_CM7_1_NMI_CTL1      ((volatile un_CPUSS_CM7_1_NMI_CTL_t*) 0x40200644UL)
#define CYREG_CPUSS_CM7_1_NMI_CTL2      ((volatile un_CPUSS_CM7_1_NMI_CTL_t*) 0x40200648UL)
#define CYREG_CPUSS_CM7_1_NMI_CTL3      ((volatile un_CPUSS_CM7_1_NMI_CTL_t*) 0x4020064CUL)
#define CYREG_CPUSS_CM0_CTL             ((volatile un_CPUSS_CM0_CTL_t*) 0x40201000UL)
#define CYREG_CPUSS_CM0_STATUS          ((volatile un_CPUSS_CM0_STATUS_t*) 0x40201004UL)
#define CYREG_CPUSS_SLOW_CLOCK_CTL      ((volatile un_CPUSS_SLOW_CLOCK_CTL_t*) 0x40201008UL)
#define CYREG_CPUSS_PERI_CLOCK_CTL      ((volatile un_CPUSS_PERI_CLOCK_CTL_t*) 0x4020100CUL)
#define CYREG_CPUSS_MEM_CLOCK_CTL       ((volatile un_CPUSS_MEM_CLOCK_CTL_t*) 0x40201010UL)
#define CYREG_CPUSS_CM0_INT0_STATUS     ((volatile un_CPUSS_CM0_INT0_STATUS_t*) 0x40201100UL)
#define CYREG_CPUSS_CM0_INT1_STATUS     ((volatile un_CPUSS_CM0_INT1_STATUS_t*) 0x40201104UL)
#define CYREG_CPUSS_CM0_INT2_STATUS     ((volatile un_CPUSS_CM0_INT2_STATUS_t*) 0x40201108UL)
#define CYREG_CPUSS_CM0_INT3_STATUS     ((volatile un_CPUSS_CM0_INT3_STATUS_t*) 0x4020110CUL)
#define CYREG_CPUSS_CM0_INT4_STATUS     ((volatile un_CPUSS_CM0_INT4_STATUS_t*) 0x40201110UL)
#define CYREG_CPUSS_CM0_INT5_STATUS     ((volatile un_CPUSS_CM0_INT5_STATUS_t*) 0x40201114UL)
#define CYREG_CPUSS_CM0_INT6_STATUS     ((volatile un_CPUSS_CM0_INT6_STATUS_t*) 0x40201118UL)
#define CYREG_CPUSS_CM0_INT7_STATUS     ((volatile un_CPUSS_CM0_INT7_STATUS_t*) 0x4020111CUL)
#define CYREG_CPUSS_CM0_VECTOR_TABLE_BASE ((volatile un_CPUSS_CM0_VECTOR_TABLE_BASE_t*) 0x40201120UL)
#define CYREG_CPUSS_CM0_NMI_CTL0        ((volatile un_CPUSS_CM0_NMI_CTL_t*) 0x40201140UL)
#define CYREG_CPUSS_CM0_NMI_CTL1        ((volatile un_CPUSS_CM0_NMI_CTL_t*) 0x40201144UL)
#define CYREG_CPUSS_CM0_NMI_CTL2        ((volatile un_CPUSS_CM0_NMI_CTL_t*) 0x40201148UL)
#define CYREG_CPUSS_CM0_NMI_CTL3        ((volatile un_CPUSS_CM0_NMI_CTL_t*) 0x4020114CUL)
#define CYREG_CPUSS_CM7_0_PWR_CTL       ((volatile un_CPUSS_CM7_0_PWR_CTL_t*) 0x40201200UL)
#define CYREG_CPUSS_CM7_0_PWR_DELAY_CTL ((volatile un_CPUSS_CM7_0_PWR_DELAY_CTL_t*) 0x40201204UL)
#define CYREG_CPUSS_CM7_1_PWR_CTL       ((volatile un_CPUSS_CM7_1_PWR_CTL_t*) 0x40201210UL)
#define CYREG_CPUSS_CM7_1_PWR_DELAY_CTL ((volatile un_CPUSS_CM7_1_PWR_DELAY_CTL_t*) 0x40201214UL)
#define CYREG_CPUSS_RAM0_CTL0           ((volatile un_CPUSS_RAM0_CTL0_t*) 0x40201300UL)
#define CYREG_CPUSS_RAM0_STATUS         ((volatile un_CPUSS_RAM0_STATUS_t*) 0x40201304UL)
#define CYREG_CPUSS_RAM0_PWR_MACRO_CTL0 ((volatile un_CPUSS_RAM0_PWR_MACRO_CTL_t*) 0x40201340UL)
#define CYREG_CPUSS_RAM0_PWR_MACRO_CTL1 ((volatile un_CPUSS_RAM0_PWR_MACRO_CTL_t*) 0x40201344UL)
#define CYREG_CPUSS_RAM0_PWR_MACRO_CTL2 ((volatile un_CPUSS_RAM0_PWR_MACRO_CTL_t*) 0x40201348UL)
#define CYREG_CPUSS_RAM0_PWR_MACRO_CTL3 ((volatile un_CPUSS_RAM0_PWR_MACRO_CTL_t*) 0x4020134CUL)
#define CYREG_CPUSS_RAM0_PWR_MACRO_CTL4 ((volatile un_CPUSS_RAM0_PWR_MACRO_CTL_t*) 0x40201350UL)
#define CYREG_CPUSS_RAM0_PWR_MACRO_CTL5 ((volatile un_CPUSS_RAM0_PWR_MACRO_CTL_t*) 0x40201354UL)
#define CYREG_CPUSS_RAM0_PWR_MACRO_CTL6 ((volatile un_CPUSS_RAM0_PWR_MACRO_CTL_t*) 0x40201358UL)
#define CYREG_CPUSS_RAM0_PWR_MACRO_CTL7 ((volatile un_CPUSS_RAM0_PWR_MACRO_CTL_t*) 0x4020135CUL)
#define CYREG_CPUSS_RAM0_PWR_MACRO_CTL8 ((volatile un_CPUSS_RAM0_PWR_MACRO_CTL_t*) 0x40201360UL)
#define CYREG_CPUSS_RAM0_PWR_MACRO_CTL9 ((volatile un_CPUSS_RAM0_PWR_MACRO_CTL_t*) 0x40201364UL)
#define CYREG_CPUSS_RAM0_PWR_MACRO_CTL10 ((volatile un_CPUSS_RAM0_PWR_MACRO_CTL_t*) 0x40201368UL)
#define CYREG_CPUSS_RAM0_PWR_MACRO_CTL11 ((volatile un_CPUSS_RAM0_PWR_MACRO_CTL_t*) 0x4020136CUL)
#define CYREG_CPUSS_RAM0_PWR_MACRO_CTL12 ((volatile un_CPUSS_RAM0_PWR_MACRO_CTL_t*) 0x40201370UL)
#define CYREG_CPUSS_RAM0_PWR_MACRO_CTL13 ((volatile un_CPUSS_RAM0_PWR_MACRO_CTL_t*) 0x40201374UL)
#define CYREG_CPUSS_RAM0_PWR_MACRO_CTL14 ((volatile un_CPUSS_RAM0_PWR_MACRO_CTL_t*) 0x40201378UL)
#define CYREG_CPUSS_RAM0_PWR_MACRO_CTL15 ((volatile un_CPUSS_RAM0_PWR_MACRO_CTL_t*) 0x4020137CUL)
#define CYREG_CPUSS_RAM1_CTL0           ((volatile un_CPUSS_RAM1_CTL0_t*) 0x40201380UL)
#define CYREG_CPUSS_RAM1_STATUS         ((volatile un_CPUSS_RAM1_STATUS_t*) 0x40201384UL)
#define CYREG_CPUSS_RAM1_PWR_CTL        ((volatile un_CPUSS_RAM1_PWR_CTL_t*) 0x40201388UL)
#define CYREG_CPUSS_RAM_PWR_DELAY_CTL   ((volatile un_CPUSS_RAM_PWR_DELAY_CTL_t*) 0x402013C0UL)
#define CYREG_CPUSS_ROM_CTL             ((volatile un_CPUSS_ROM_CTL_t*) 0x402013C4UL)
#define CYREG_CPUSS_ECC_CTL             ((volatile un_CPUSS_ECC_CTL_t*) 0x402013C8UL)
#define CYREG_CPUSS_PRODUCT_ID          ((volatile un_CPUSS_PRODUCT_ID_t*) 0x40201400UL)
#define CYREG_CPUSS_DP_STATUS           ((volatile un_CPUSS_DP_STATUS_t*) 0x40201410UL)
#define CYREG_CPUSS_AP_CTL              ((volatile un_CPUSS_AP_CTL_t*) 0x40201414UL)
#define CYREG_CPUSS_BUFF_CTL            ((volatile un_CPUSS_BUFF_CTL_t*) 0x40201500UL)
#define CYREG_CPUSS_SYSTICK_CTL         ((volatile un_CPUSS_SYSTICK_CTL_t*) 0x40201600UL)
#define CYREG_CPUSS_CAL_SUP_SET         ((volatile un_CPUSS_CAL_SUP_SET_t*) 0x40201800UL)
#define CYREG_CPUSS_CAL_SUP_CLR         ((volatile un_CPUSS_CAL_SUP_CLR_t*) 0x40201804UL)
#define CYREG_CPUSS_CM0_PC_CTL          ((volatile un_CPUSS_CM0_PC_CTL_t*) 0x40202000UL)
#define CYREG_CPUSS_CM0_PC0_HANDLER     ((volatile un_CPUSS_CM0_PC0_HANDLER_t*) 0x40202040UL)
#define CYREG_CPUSS_CM0_PC1_HANDLER     ((volatile un_CPUSS_CM0_PC1_HANDLER_t*) 0x40202044UL)
#define CYREG_CPUSS_CM0_PC2_HANDLER     ((volatile un_CPUSS_CM0_PC2_HANDLER_t*) 0x40202048UL)
#define CYREG_CPUSS_CM0_PC3_HANDLER     ((volatile un_CPUSS_CM0_PC3_HANDLER_t*) 0x4020204CUL)
#define CYREG_CPUSS_PROTECTION          ((volatile un_CPUSS_PROTECTION_t*) 0x402020C4UL)
#define CYREG_CPUSS_TRIM_ROM_CTL        ((volatile un_CPUSS_TRIM_ROM_CTL_t*) 0x40202100UL)
#define CYREG_CPUSS_TRIM_RAM_CTL        ((volatile un_CPUSS_TRIM_RAM_CTL_t*) 0x40202104UL)
#define CYREG_CPUSS_TRIM_RAM200_CTL     ((volatile un_CPUSS_TRIM_RAM200_CTL_t*) 0x40202108UL)
#define CYREG_CPUSS_TRIM_RAM350_CTL     ((volatile un_CPUSS_TRIM_RAM350_CTL_t*) 0x4020210CUL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL0 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208000UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL1 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208004UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL2 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208008UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL3 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x4020800CUL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL4 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208010UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL5 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208014UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL6 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208018UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL7 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x4020801CUL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL8 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208020UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL9 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208024UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL10 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208028UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL11 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x4020802CUL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL12 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208030UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL13 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208034UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL14 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208038UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL15 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x4020803CUL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL16 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208040UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL17 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208044UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL18 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208048UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL19 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x4020804CUL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL20 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208050UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL21 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208054UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL22 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208058UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL23 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x4020805CUL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL24 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208060UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL25 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208064UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL26 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208068UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL27 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x4020806CUL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL28 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208070UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL29 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208074UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL30 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208078UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL31 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x4020807CUL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL32 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208080UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL33 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208084UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL34 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208088UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL35 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x4020808CUL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL36 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208090UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL37 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208094UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL38 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208098UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL39 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x4020809CUL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL40 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x402080A0UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL41 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x402080A4UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL42 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x402080A8UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL43 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x402080ACUL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL44 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x402080B0UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL45 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x402080B4UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL46 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x402080B8UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL47 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x402080BCUL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL48 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x402080C0UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL49 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x402080C4UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL50 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x402080C8UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL51 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x402080CCUL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL52 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x402080D0UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL53 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x402080D4UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL54 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x402080D8UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL55 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x402080DCUL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL56 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x402080E0UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL57 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x402080E4UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL58 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x402080E8UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL59 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x402080ECUL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL60 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x402080F0UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL61 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x402080F4UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL62 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x402080F8UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL63 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x402080FCUL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL64 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208100UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL65 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208104UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL66 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208108UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL67 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x4020810CUL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL68 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208110UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL69 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208114UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL70 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208118UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL71 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x4020811CUL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL72 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208120UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL73 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208124UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL74 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208128UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL75 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x4020812CUL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL76 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208130UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL77 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208134UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL78 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208138UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL79 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x4020813CUL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL80 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208140UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL81 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208144UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL82 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208148UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL83 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x4020814CUL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL84 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208150UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL85 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208154UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL86 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208158UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL87 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x4020815CUL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL88 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208160UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL89 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208164UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL90 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208168UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL91 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x4020816CUL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL92 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208170UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL93 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208174UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL94 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208178UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL95 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x4020817CUL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL96 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208180UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL97 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208184UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL98 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208188UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL99 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x4020818CUL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL100 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208190UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL101 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208194UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL102 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208198UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL103 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x4020819CUL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL104 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x402081A0UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL105 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x402081A4UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL106 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x402081A8UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL107 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x402081ACUL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL108 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x402081B0UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL109 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x402081B4UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL110 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x402081B8UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL111 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x402081BCUL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL112 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x402081C0UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL113 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x402081C4UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL114 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x402081C8UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL115 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x402081CCUL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL116 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x402081D0UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL117 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x402081D4UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL118 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x402081D8UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL119 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x402081DCUL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL120 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x402081E0UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL121 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x402081E4UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL122 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x402081E8UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL123 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x402081ECUL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL124 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x402081F0UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL125 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x402081F4UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL126 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x402081F8UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL127 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x402081FCUL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL128 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208200UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL129 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208204UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL130 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208208UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL131 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x4020820CUL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL132 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208210UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL133 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208214UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL134 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208218UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL135 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x4020821CUL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL136 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208220UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL137 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208224UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL138 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208228UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL139 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x4020822CUL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL140 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208230UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL141 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208234UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL142 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208238UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL143 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x4020823CUL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL144 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208240UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL145 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208244UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL146 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208248UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL147 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x4020824CUL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL148 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208250UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL149 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208254UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL150 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208258UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL151 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x4020825CUL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL152 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208260UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL153 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208264UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL154 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208268UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL155 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x4020826CUL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL156 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208270UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL157 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208274UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL158 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208278UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL159 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x4020827CUL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL160 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208280UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL161 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208284UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL162 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208288UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL163 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x4020828CUL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL164 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208290UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL165 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208294UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL166 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208298UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL167 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x4020829CUL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL168 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x402082A0UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL169 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x402082A4UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL170 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x402082A8UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL171 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x402082ACUL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL172 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x402082B0UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL173 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x402082B4UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL174 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x402082B8UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL175 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x402082BCUL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL176 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x402082C0UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL177 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x402082C4UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL178 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x402082C8UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL179 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x402082CCUL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL180 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x402082D0UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL181 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x402082D4UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL182 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x402082D8UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL183 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x402082DCUL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL184 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x402082E0UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL185 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x402082E4UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL186 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x402082E8UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL187 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x402082ECUL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL188 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x402082F0UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL189 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x402082F4UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL190 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x402082F8UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL191 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x402082FCUL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL192 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208300UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL193 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208304UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL194 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208308UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL195 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x4020830CUL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL196 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208310UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL197 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208314UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL198 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208318UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL199 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x4020831CUL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL200 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208320UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL201 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208324UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL202 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208328UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL203 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x4020832CUL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL204 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208330UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL205 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208334UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL206 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208338UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL207 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x4020833CUL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL208 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208340UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL209 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208344UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL210 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208348UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL211 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x4020834CUL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL212 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208350UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL213 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208354UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL214 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208358UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL215 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x4020835CUL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL216 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208360UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL217 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208364UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL218 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208368UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL219 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x4020836CUL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL220 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208370UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL221 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208374UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL222 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208378UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL223 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x4020837CUL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL224 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208380UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL225 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208384UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL226 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208388UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL227 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x4020838CUL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL228 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208390UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL229 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208394UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL230 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208398UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL231 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x4020839CUL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL232 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x402083A0UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL233 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x402083A4UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL234 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x402083A8UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL235 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x402083ACUL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL236 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x402083B0UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL237 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x402083B4UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL238 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x402083B8UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL239 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x402083BCUL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL240 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x402083C0UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL241 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x402083C4UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL242 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x402083C8UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL243 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x402083CCUL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL244 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x402083D0UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL245 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x402083D4UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL246 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x402083D8UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL247 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x402083DCUL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL248 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x402083E0UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL249 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x402083E4UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL250 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x402083E8UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL251 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x402083ECUL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL252 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x402083F0UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL253 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x402083F4UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL254 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x402083F8UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL255 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x402083FCUL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL256 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208400UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL257 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208404UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL258 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208408UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL259 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x4020840CUL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL260 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208410UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL261 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208414UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL262 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208418UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL263 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x4020841CUL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL264 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208420UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL265 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208424UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL266 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208428UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL267 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x4020842CUL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL268 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208430UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL269 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208434UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL270 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208438UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL271 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x4020843CUL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL272 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208440UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL273 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208444UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL274 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208448UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL275 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x4020844CUL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL276 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208450UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL277 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208454UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL278 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208458UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL279 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x4020845CUL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL280 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208460UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL281 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208464UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL282 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208468UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL283 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x4020846CUL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL284 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208470UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL285 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208474UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL286 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208478UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL287 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x4020847CUL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL288 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208480UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL289 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208484UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL290 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208488UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL291 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x4020848CUL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL292 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208490UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL293 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208494UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL294 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208498UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL295 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x4020849CUL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL296 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x402084A0UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL297 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x402084A4UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL298 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x402084A8UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL299 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x402084ACUL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL300 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x402084B0UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL301 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x402084B4UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL302 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x402084B8UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL303 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x402084BCUL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL304 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x402084C0UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL305 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x402084C4UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL306 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x402084C8UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL307 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x402084CCUL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL308 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x402084D0UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL309 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x402084D4UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL310 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x402084D8UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL311 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x402084DCUL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL312 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x402084E0UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL313 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x402084E4UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL314 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x402084E8UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL315 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x402084ECUL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL316 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x402084F0UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL317 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x402084F4UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL318 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x402084F8UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL319 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x402084FCUL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL320 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208500UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL321 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208504UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL322 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208508UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL323 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x4020850CUL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL324 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208510UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL325 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208514UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL326 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208518UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL327 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x4020851CUL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL328 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208520UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL329 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208524UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL330 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208528UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL331 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x4020852CUL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL332 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208530UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL333 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208534UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL334 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208538UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL335 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x4020853CUL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL336 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208540UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL337 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208544UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL338 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208548UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL339 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x4020854CUL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL340 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208550UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL341 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208554UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL342 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208558UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL343 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x4020855CUL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL344 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208560UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL345 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208564UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL346 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208568UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL347 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x4020856CUL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL348 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208570UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL349 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208574UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL350 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208578UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL351 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x4020857CUL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL352 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208580UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL353 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208584UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL354 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208588UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL355 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x4020858CUL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL356 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208590UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL357 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208594UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL358 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208598UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL359 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x4020859CUL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL360 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x402085A0UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL361 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x402085A4UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL362 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x402085A8UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL363 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x402085ACUL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL364 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x402085B0UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL365 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x402085B4UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL366 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x402085B8UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL367 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x402085BCUL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL368 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x402085C0UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL369 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x402085C4UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL370 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x402085C8UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL371 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x402085CCUL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL372 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x402085D0UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL373 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x402085D4UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL374 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x402085D8UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL375 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x402085DCUL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL376 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x402085E0UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL377 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x402085E4UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL378 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x402085E8UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL379 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x402085ECUL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL380 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x402085F0UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL381 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x402085F4UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL382 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x402085F8UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL383 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x402085FCUL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL384 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208600UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL385 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208604UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL386 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208608UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL387 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x4020860CUL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL388 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208610UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL389 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208614UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL390 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208618UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL391 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x4020861CUL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL392 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208620UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL393 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208624UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL394 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208628UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL395 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x4020862CUL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL396 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208630UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL397 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208634UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL398 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208638UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL399 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x4020863CUL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL400 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208640UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL401 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208644UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL402 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208648UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL403 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x4020864CUL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL404 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208650UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL405 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208654UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL406 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208658UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL407 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x4020865CUL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL408 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208660UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL409 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208664UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL410 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208668UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL411 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x4020866CUL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL412 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208670UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL413 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208674UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL414 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208678UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL415 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x4020867CUL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL416 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208680UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL417 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208684UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL418 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208688UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL419 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x4020868CUL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL420 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208690UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL421 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208694UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL422 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x40208698UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL423 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x4020869CUL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL424 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x402086A0UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL425 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x402086A4UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL426 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x402086A8UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL427 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x402086ACUL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL428 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x402086B0UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL429 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x402086B4UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL430 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x402086B8UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL431 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x402086BCUL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL432 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x402086C0UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL433 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x402086C4UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL434 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x402086C8UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL435 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x402086CCUL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL436 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x402086D0UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL437 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x402086D4UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL438 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x402086D8UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL439 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x402086DCUL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL440 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x402086E0UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL441 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x402086E4UL)
#define CYREG_CPUSS_CM0_SYSTEM_INT_CTL442 ((volatile un_CPUSS_CM0_SYSTEM_INT_CTL_t*) 0x402086E8UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL0 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A000UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL1 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A004UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL2 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A008UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL3 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A00CUL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL4 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A010UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL5 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A014UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL6 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A018UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL7 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A01CUL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL8 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A020UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL9 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A024UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL10 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A028UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL11 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A02CUL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL12 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A030UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL13 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A034UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL14 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A038UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL15 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A03CUL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL16 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A040UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL17 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A044UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL18 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A048UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL19 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A04CUL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL20 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A050UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL21 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A054UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL22 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A058UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL23 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A05CUL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL24 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A060UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL25 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A064UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL26 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A068UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL27 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A06CUL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL28 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A070UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL29 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A074UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL30 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A078UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL31 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A07CUL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL32 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A080UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL33 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A084UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL34 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A088UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL35 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A08CUL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL36 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A090UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL37 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A094UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL38 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A098UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL39 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A09CUL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL40 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A0A0UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL41 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A0A4UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL42 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A0A8UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL43 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A0ACUL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL44 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A0B0UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL45 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A0B4UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL46 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A0B8UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL47 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A0BCUL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL48 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A0C0UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL49 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A0C4UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL50 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A0C8UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL51 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A0CCUL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL52 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A0D0UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL53 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A0D4UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL54 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A0D8UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL55 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A0DCUL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL56 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A0E0UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL57 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A0E4UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL58 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A0E8UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL59 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A0ECUL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL60 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A0F0UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL61 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A0F4UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL62 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A0F8UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL63 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A0FCUL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL64 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A100UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL65 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A104UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL66 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A108UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL67 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A10CUL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL68 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A110UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL69 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A114UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL70 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A118UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL71 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A11CUL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL72 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A120UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL73 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A124UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL74 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A128UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL75 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A12CUL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL76 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A130UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL77 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A134UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL78 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A138UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL79 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A13CUL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL80 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A140UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL81 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A144UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL82 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A148UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL83 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A14CUL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL84 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A150UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL85 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A154UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL86 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A158UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL87 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A15CUL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL88 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A160UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL89 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A164UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL90 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A168UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL91 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A16CUL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL92 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A170UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL93 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A174UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL94 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A178UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL95 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A17CUL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL96 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A180UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL97 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A184UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL98 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A188UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL99 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A18CUL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL100 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A190UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL101 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A194UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL102 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A198UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL103 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A19CUL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL104 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A1A0UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL105 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A1A4UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL106 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A1A8UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL107 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A1ACUL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL108 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A1B0UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL109 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A1B4UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL110 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A1B8UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL111 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A1BCUL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL112 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A1C0UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL113 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A1C4UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL114 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A1C8UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL115 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A1CCUL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL116 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A1D0UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL117 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A1D4UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL118 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A1D8UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL119 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A1DCUL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL120 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A1E0UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL121 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A1E4UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL122 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A1E8UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL123 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A1ECUL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL124 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A1F0UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL125 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A1F4UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL126 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A1F8UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL127 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A1FCUL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL128 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A200UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL129 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A204UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL130 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A208UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL131 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A20CUL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL132 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A210UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL133 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A214UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL134 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A218UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL135 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A21CUL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL136 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A220UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL137 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A224UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL138 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A228UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL139 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A22CUL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL140 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A230UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL141 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A234UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL142 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A238UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL143 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A23CUL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL144 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A240UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL145 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A244UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL146 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A248UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL147 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A24CUL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL148 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A250UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL149 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A254UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL150 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A258UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL151 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A25CUL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL152 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A260UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL153 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A264UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL154 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A268UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL155 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A26CUL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL156 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A270UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL157 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A274UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL158 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A278UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL159 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A27CUL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL160 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A280UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL161 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A284UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL162 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A288UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL163 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A28CUL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL164 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A290UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL165 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A294UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL166 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A298UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL167 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A29CUL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL168 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A2A0UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL169 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A2A4UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL170 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A2A8UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL171 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A2ACUL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL172 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A2B0UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL173 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A2B4UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL174 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A2B8UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL175 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A2BCUL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL176 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A2C0UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL177 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A2C4UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL178 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A2C8UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL179 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A2CCUL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL180 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A2D0UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL181 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A2D4UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL182 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A2D8UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL183 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A2DCUL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL184 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A2E0UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL185 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A2E4UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL186 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A2E8UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL187 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A2ECUL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL188 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A2F0UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL189 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A2F4UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL190 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A2F8UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL191 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A2FCUL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL192 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A300UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL193 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A304UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL194 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A308UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL195 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A30CUL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL196 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A310UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL197 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A314UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL198 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A318UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL199 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A31CUL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL200 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A320UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL201 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A324UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL202 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A328UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL203 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A32CUL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL204 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A330UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL205 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A334UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL206 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A338UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL207 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A33CUL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL208 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A340UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL209 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A344UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL210 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A348UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL211 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A34CUL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL212 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A350UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL213 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A354UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL214 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A358UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL215 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A35CUL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL216 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A360UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL217 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A364UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL218 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A368UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL219 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A36CUL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL220 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A370UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL221 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A374UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL222 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A378UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL223 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A37CUL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL224 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A380UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL225 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A384UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL226 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A388UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL227 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A38CUL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL228 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A390UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL229 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A394UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL230 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A398UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL231 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A39CUL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL232 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A3A0UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL233 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A3A4UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL234 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A3A8UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL235 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A3ACUL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL236 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A3B0UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL237 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A3B4UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL238 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A3B8UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL239 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A3BCUL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL240 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A3C0UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL241 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A3C4UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL242 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A3C8UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL243 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A3CCUL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL244 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A3D0UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL245 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A3D4UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL246 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A3D8UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL247 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A3DCUL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL248 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A3E0UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL249 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A3E4UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL250 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A3E8UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL251 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A3ECUL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL252 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A3F0UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL253 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A3F4UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL254 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A3F8UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL255 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A3FCUL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL256 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A400UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL257 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A404UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL258 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A408UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL259 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A40CUL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL260 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A410UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL261 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A414UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL262 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A418UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL263 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A41CUL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL264 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A420UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL265 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A424UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL266 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A428UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL267 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A42CUL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL268 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A430UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL269 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A434UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL270 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A438UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL271 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A43CUL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL272 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A440UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL273 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A444UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL274 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A448UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL275 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A44CUL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL276 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A450UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL277 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A454UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL278 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A458UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL279 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A45CUL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL280 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A460UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL281 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A464UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL282 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A468UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL283 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A46CUL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL284 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A470UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL285 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A474UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL286 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A478UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL287 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A47CUL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL288 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A480UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL289 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A484UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL290 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A488UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL291 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A48CUL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL292 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A490UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL293 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A494UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL294 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A498UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL295 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A49CUL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL296 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A4A0UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL297 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A4A4UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL298 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A4A8UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL299 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A4ACUL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL300 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A4B0UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL301 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A4B4UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL302 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A4B8UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL303 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A4BCUL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL304 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A4C0UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL305 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A4C4UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL306 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A4C8UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL307 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A4CCUL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL308 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A4D0UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL309 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A4D4UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL310 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A4D8UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL311 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A4DCUL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL312 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A4E0UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL313 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A4E4UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL314 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A4E8UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL315 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A4ECUL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL316 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A4F0UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL317 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A4F4UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL318 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A4F8UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL319 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A4FCUL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL320 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A500UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL321 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A504UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL322 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A508UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL323 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A50CUL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL324 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A510UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL325 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A514UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL326 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A518UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL327 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A51CUL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL328 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A520UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL329 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A524UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL330 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A528UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL331 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A52CUL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL332 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A530UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL333 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A534UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL334 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A538UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL335 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A53CUL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL336 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A540UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL337 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A544UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL338 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A548UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL339 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A54CUL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL340 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A550UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL341 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A554UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL342 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A558UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL343 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A55CUL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL344 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A560UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL345 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A564UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL346 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A568UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL347 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A56CUL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL348 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A570UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL349 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A574UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL350 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A578UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL351 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A57CUL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL352 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A580UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL353 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A584UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL354 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A588UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL355 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A58CUL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL356 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A590UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL357 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A594UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL358 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A598UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL359 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A59CUL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL360 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A5A0UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL361 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A5A4UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL362 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A5A8UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL363 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A5ACUL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL364 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A5B0UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL365 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A5B4UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL366 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A5B8UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL367 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A5BCUL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL368 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A5C0UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL369 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A5C4UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL370 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A5C8UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL371 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A5CCUL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL372 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A5D0UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL373 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A5D4UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL374 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A5D8UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL375 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A5DCUL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL376 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A5E0UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL377 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A5E4UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL378 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A5E8UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL379 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A5ECUL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL380 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A5F0UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL381 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A5F4UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL382 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A5F8UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL383 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A5FCUL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL384 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A600UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL385 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A604UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL386 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A608UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL387 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A60CUL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL388 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A610UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL389 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A614UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL390 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A618UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL391 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A61CUL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL392 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A620UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL393 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A624UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL394 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A628UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL395 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A62CUL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL396 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A630UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL397 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A634UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL398 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A638UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL399 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A63CUL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL400 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A640UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL401 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A644UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL402 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A648UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL403 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A64CUL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL404 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A650UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL405 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A654UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL406 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A658UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL407 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A65CUL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL408 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A660UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL409 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A664UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL410 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A668UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL411 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A66CUL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL412 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A670UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL413 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A674UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL414 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A678UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL415 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A67CUL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL416 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A680UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL417 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A684UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL418 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A688UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL419 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A68CUL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL420 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A690UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL421 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A694UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL422 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A698UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL423 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A69CUL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL424 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A6A0UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL425 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A6A4UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL426 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A6A8UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL427 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A6ACUL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL428 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A6B0UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL429 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A6B4UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL430 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A6B8UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL431 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A6BCUL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL432 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A6C0UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL433 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A6C4UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL434 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A6C8UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL435 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A6CCUL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL436 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A6D0UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL437 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A6D4UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL438 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A6D8UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL439 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A6DCUL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL440 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A6E0UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL441 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A6E4UL)
#define CYREG_CPUSS_CM7_0_SYSTEM_INT_CTL442 ((volatile un_CPUSS_CM7_0_SYSTEM_INT_CTL_t*) 0x4020A6E8UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL0 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C000UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL1 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C004UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL2 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C008UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL3 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C00CUL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL4 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C010UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL5 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C014UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL6 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C018UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL7 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C01CUL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL8 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C020UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL9 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C024UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL10 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C028UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL11 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C02CUL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL12 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C030UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL13 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C034UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL14 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C038UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL15 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C03CUL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL16 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C040UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL17 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C044UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL18 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C048UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL19 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C04CUL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL20 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C050UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL21 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C054UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL22 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C058UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL23 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C05CUL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL24 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C060UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL25 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C064UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL26 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C068UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL27 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C06CUL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL28 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C070UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL29 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C074UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL30 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C078UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL31 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C07CUL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL32 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C080UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL33 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C084UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL34 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C088UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL35 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C08CUL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL36 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C090UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL37 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C094UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL38 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C098UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL39 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C09CUL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL40 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C0A0UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL41 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C0A4UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL42 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C0A8UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL43 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C0ACUL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL44 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C0B0UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL45 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C0B4UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL46 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C0B8UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL47 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C0BCUL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL48 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C0C0UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL49 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C0C4UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL50 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C0C8UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL51 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C0CCUL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL52 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C0D0UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL53 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C0D4UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL54 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C0D8UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL55 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C0DCUL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL56 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C0E0UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL57 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C0E4UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL58 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C0E8UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL59 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C0ECUL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL60 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C0F0UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL61 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C0F4UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL62 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C0F8UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL63 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C0FCUL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL64 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C100UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL65 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C104UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL66 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C108UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL67 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C10CUL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL68 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C110UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL69 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C114UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL70 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C118UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL71 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C11CUL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL72 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C120UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL73 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C124UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL74 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C128UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL75 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C12CUL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL76 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C130UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL77 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C134UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL78 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C138UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL79 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C13CUL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL80 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C140UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL81 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C144UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL82 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C148UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL83 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C14CUL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL84 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C150UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL85 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C154UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL86 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C158UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL87 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C15CUL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL88 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C160UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL89 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C164UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL90 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C168UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL91 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C16CUL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL92 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C170UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL93 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C174UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL94 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C178UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL95 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C17CUL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL96 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C180UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL97 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C184UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL98 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C188UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL99 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C18CUL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL100 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C190UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL101 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C194UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL102 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C198UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL103 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C19CUL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL104 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C1A0UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL105 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C1A4UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL106 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C1A8UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL107 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C1ACUL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL108 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C1B0UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL109 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C1B4UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL110 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C1B8UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL111 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C1BCUL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL112 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C1C0UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL113 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C1C4UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL114 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C1C8UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL115 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C1CCUL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL116 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C1D0UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL117 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C1D4UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL118 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C1D8UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL119 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C1DCUL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL120 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C1E0UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL121 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C1E4UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL122 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C1E8UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL123 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C1ECUL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL124 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C1F0UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL125 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C1F4UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL126 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C1F8UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL127 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C1FCUL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL128 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C200UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL129 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C204UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL130 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C208UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL131 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C20CUL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL132 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C210UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL133 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C214UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL134 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C218UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL135 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C21CUL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL136 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C220UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL137 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C224UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL138 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C228UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL139 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C22CUL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL140 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C230UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL141 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C234UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL142 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C238UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL143 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C23CUL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL144 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C240UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL145 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C244UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL146 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C248UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL147 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C24CUL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL148 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C250UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL149 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C254UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL150 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C258UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL151 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C25CUL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL152 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C260UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL153 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C264UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL154 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C268UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL155 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C26CUL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL156 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C270UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL157 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C274UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL158 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C278UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL159 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C27CUL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL160 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C280UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL161 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C284UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL162 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C288UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL163 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C28CUL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL164 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C290UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL165 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C294UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL166 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C298UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL167 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C29CUL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL168 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C2A0UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL169 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C2A4UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL170 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C2A8UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL171 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C2ACUL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL172 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C2B0UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL173 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C2B4UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL174 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C2B8UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL175 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C2BCUL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL176 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C2C0UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL177 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C2C4UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL178 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C2C8UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL179 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C2CCUL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL180 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C2D0UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL181 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C2D4UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL182 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C2D8UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL183 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C2DCUL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL184 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C2E0UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL185 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C2E4UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL186 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C2E8UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL187 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C2ECUL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL188 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C2F0UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL189 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C2F4UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL190 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C2F8UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL191 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C2FCUL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL192 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C300UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL193 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C304UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL194 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C308UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL195 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C30CUL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL196 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C310UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL197 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C314UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL198 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C318UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL199 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C31CUL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL200 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C320UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL201 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C324UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL202 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C328UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL203 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C32CUL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL204 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C330UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL205 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C334UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL206 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C338UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL207 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C33CUL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL208 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C340UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL209 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C344UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL210 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C348UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL211 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C34CUL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL212 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C350UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL213 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C354UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL214 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C358UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL215 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C35CUL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL216 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C360UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL217 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C364UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL218 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C368UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL219 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C36CUL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL220 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C370UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL221 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C374UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL222 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C378UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL223 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C37CUL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL224 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C380UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL225 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C384UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL226 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C388UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL227 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C38CUL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL228 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C390UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL229 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C394UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL230 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C398UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL231 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C39CUL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL232 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C3A0UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL233 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C3A4UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL234 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C3A8UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL235 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C3ACUL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL236 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C3B0UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL237 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C3B4UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL238 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C3B8UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL239 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C3BCUL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL240 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C3C0UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL241 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C3C4UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL242 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C3C8UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL243 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C3CCUL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL244 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C3D0UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL245 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C3D4UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL246 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C3D8UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL247 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C3DCUL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL248 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C3E0UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL249 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C3E4UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL250 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C3E8UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL251 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C3ECUL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL252 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C3F0UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL253 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C3F4UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL254 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C3F8UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL255 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C3FCUL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL256 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C400UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL257 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C404UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL258 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C408UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL259 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C40CUL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL260 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C410UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL261 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C414UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL262 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C418UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL263 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C41CUL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL264 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C420UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL265 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C424UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL266 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C428UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL267 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C42CUL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL268 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C430UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL269 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C434UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL270 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C438UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL271 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C43CUL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL272 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C440UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL273 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C444UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL274 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C448UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL275 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C44CUL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL276 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C450UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL277 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C454UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL278 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C458UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL279 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C45CUL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL280 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C460UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL281 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C464UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL282 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C468UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL283 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C46CUL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL284 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C470UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL285 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C474UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL286 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C478UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL287 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C47CUL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL288 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C480UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL289 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C484UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL290 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C488UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL291 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C48CUL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL292 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C490UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL293 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C494UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL294 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C498UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL295 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C49CUL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL296 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C4A0UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL297 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C4A4UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL298 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C4A8UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL299 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C4ACUL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL300 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C4B0UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL301 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C4B4UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL302 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C4B8UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL303 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C4BCUL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL304 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C4C0UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL305 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C4C4UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL306 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C4C8UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL307 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C4CCUL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL308 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C4D0UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL309 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C4D4UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL310 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C4D8UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL311 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C4DCUL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL312 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C4E0UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL313 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C4E4UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL314 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C4E8UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL315 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C4ECUL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL316 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C4F0UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL317 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C4F4UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL318 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C4F8UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL319 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C4FCUL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL320 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C500UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL321 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C504UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL322 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C508UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL323 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C50CUL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL324 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C510UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL325 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C514UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL326 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C518UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL327 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C51CUL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL328 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C520UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL329 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C524UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL330 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C528UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL331 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C52CUL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL332 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C530UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL333 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C534UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL334 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C538UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL335 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C53CUL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL336 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C540UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL337 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C544UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL338 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C548UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL339 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C54CUL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL340 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C550UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL341 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C554UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL342 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C558UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL343 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C55CUL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL344 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C560UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL345 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C564UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL346 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C568UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL347 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C56CUL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL348 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C570UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL349 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C574UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL350 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C578UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL351 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C57CUL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL352 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C580UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL353 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C584UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL354 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C588UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL355 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C58CUL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL356 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C590UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL357 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C594UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL358 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C598UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL359 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C59CUL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL360 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C5A0UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL361 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C5A4UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL362 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C5A8UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL363 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C5ACUL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL364 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C5B0UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL365 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C5B4UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL366 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C5B8UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL367 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C5BCUL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL368 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C5C0UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL369 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C5C4UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL370 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C5C8UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL371 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C5CCUL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL372 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C5D0UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL373 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C5D4UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL374 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C5D8UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL375 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C5DCUL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL376 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C5E0UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL377 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C5E4UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL378 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C5E8UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL379 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C5ECUL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL380 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C5F0UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL381 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C5F4UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL382 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C5F8UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL383 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C5FCUL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL384 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C600UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL385 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C604UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL386 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C608UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL387 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C60CUL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL388 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C610UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL389 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C614UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL390 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C618UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL391 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C61CUL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL392 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C620UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL393 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C624UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL394 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C628UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL395 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C62CUL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL396 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C630UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL397 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C634UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL398 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C638UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL399 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C63CUL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL400 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C640UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL401 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C644UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL402 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C648UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL403 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C64CUL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL404 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C650UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL405 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C654UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL406 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C658UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL407 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C65CUL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL408 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C660UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL409 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C664UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL410 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C668UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL411 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C66CUL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL412 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C670UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL413 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C674UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL414 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C678UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL415 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C67CUL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL416 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C680UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL417 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C684UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL418 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C688UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL419 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C68CUL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL420 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C690UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL421 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C694UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL422 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C698UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL423 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C69CUL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL424 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C6A0UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL425 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C6A4UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL426 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C6A8UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL427 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C6ACUL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL428 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C6B0UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL429 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C6B4UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL430 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C6B8UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL431 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C6BCUL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL432 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C6C0UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL433 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C6C4UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL434 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C6C8UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL435 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C6CCUL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL436 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C6D0UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL437 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C6D4UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL438 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C6D8UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL439 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C6DCUL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL440 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C6E0UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL441 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C6E4UL)
#define CYREG_CPUSS_CM7_1_SYSTEM_INT_CTL442 ((volatile un_CPUSS_CM7_1_SYSTEM_INT_CTL_t*) 0x4020C6E8UL)

#endif /* _CYREG_CPUSS_H_ */


/* [] END OF FILE */
